"Offline Testing of Reversible Logic Circuits: An Analysis."

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar (2018)

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DOI: 10.1016/J.VLSI.2018.01.004

access: closed

type: Journal Article

metadata version: 2022-07-14

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Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar:
Offline Testing of Reversible Logic Circuits: An Analysis. Integr. 62: 50-67 (2018)

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