![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
"High speed modular systolic array-based DTCWT with parallel processing ..."
S. S. Divakara, Sudarshan Patilkulkarni, Cyril Prasanna Raj (2017)
- S. S. Divakara, Sudarshan Patilkulkarni
, Cyril Prasanna Raj:
High speed modular systolic array-based DTCWT with parallel processing architecture for 2D image transformation on FPGA. Int. J. Wavelets Multiresolution Inf. Process. 15(5): 1750047:1-1750047:16 (2017)
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.