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"An efficient implementation of FPGA based high speed IPSec (AH/ESP) core."

Muzaffar Rao et al. (2018)

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DOI: 10.1504/IJIPT.2018.092477

access: closed

type: Journal Article

metadata version: 2020-12-29

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  - https://dblp.org/rec/journals/ijipt/RaoNODLT18
Muzaffar Rao, Thomas Newe, Edin Omerdic, Gerard Dooly, Elfed Lewis, Daniel Toal:
An efficient implementation of FPGA based high speed IPSec (AH/ESP) core. Int. J. Internet Protoc. Technol. 11(2): 97-109 (2018)

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