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"A Simulated Annealing Algorithm for System-on-Chip Test Scheduling with, ..."

Haidar M. Harmanani, Hassan A. Salamy (2006)

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DOI: 10.1142/S1469026806002052

access: closed

type: Journal Article

metadata version: 2020-08-25

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Haidar M. Harmanani, Hassan A. Salamy:
A Simulated Annealing Algorithm for System-on-Chip Test Scheduling with, Power and Precedence Constraints. Int. J. Comput. Intell. Appl. 6(4): 511-530 (2006)

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