Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Analysis of the reconfiguration latency and energy overheads for a Xilinx ..."

Javier Olivito et al. (2018)

> Home

Details and statistics

DOI: 10.1049/IET-CDT.2016.0095

access: closed

type: Journal Article

metadata version: 2022-06-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/iet-cdt/OlivitoSCMR18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/iet-cdt/OlivitoSCMR18
Javier Olivito, Felipe Serrano, Juan Antonio Clemente, Hortensia Mecha, Javier Resano:
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array. IET Comput. Digit. Tech. 12(4): 150-157 (2018)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.