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"Efficient ASIC and FPGA implementation of cube architecture."

Ranjan Kumar Barik, Manoranjan Pradhan (2017)

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DOI: 10.1049/IET-CDT.2016.0043

access: closed

type: Journal Article

metadata version: 2020-07-14

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  - https://dblp.org/rec/journals/iet-cdt/BarikP17
Ranjan Kumar Barik, Manoranjan Pradhan:
Efficient ASIC and FPGA implementation of cube architecture. IET Comput. Digit. Tech. 11(1): 43-49 (2017)

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