"Low power radiation aware transistor level design using tri-state inverter ..."

Ramaian Subramanian Kamalakannan, Kuppusamy Venkatachalam (2019)

> Home

Details and statistics

DOI: 10.1049/IET-CDS.2018.5232

access: closed

type: Journal Article

metadata version: 2020-09-10

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/iet-cds/KamalakannanV19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/iet-cds/KamalakannanV19
Ramaian Subramanian Kamalakannan, Kuppusamy Venkatachalam:
Low power radiation aware transistor level design using tri-state inverter embedded non-clock gating technique. IET Circuits Devices Syst. 13(7): 1063-1070 (2019)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.