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"1-5.6 Gb/s CMOS clock and data recovery IC with a static phase offset ..."
Sangjin Byun et al. (2013)
- Sangjin Byun, Chung Hwan Son, Jongil Hwang, Byung-Hun Min, Mun-Yang Park, Hyun-Kyu Yu:
1-5.6 Gb/s CMOS clock and data recovery IC with a static phase offset compensated linear phase detector. IET Circuits Devices Syst. 7(3) (2013)
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