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"Evaluation of Interconnect-Complexity-Aware Low-Power VLSI Design Using ..."

Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (2008)

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DOI: 10.1093/IETFEC/E91-A.12.3596

access: closed

type: Journal Article

metadata version: 2020-04-11

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Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama:
Evaluation of Interconnect-Complexity-Aware Low-Power VLSI Design Using Multiple Supply and Threshold Voltages. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3596-3606 (2008)

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