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"Low-Power Wiring Method for Band-Limited Signals in CMOS Logic Circuits by ..."

Katsuhiko Ueda et al. (2015)

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DOI: 10.1587/TRANSELE.E98.C.356

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - journals/ieicet/UedaRHH15
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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/UedaRHH15
Katsuhiko Ueda, Zuiko Rikuhashi, Kentaro Hayashi, Hiroomi Hikawa:
Low-Power Wiring Method for Band-Limited Signals in CMOS Logic Circuits by Segmentation Coding with Pseudo-Majority Voting. IEICE Trans. Electron. 98-C(4): 356-363 (2015)

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