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"Sleep Transistor Sizing Method Using Accurate Delay Estimation Considering ..."

Seidai Takeda et al. (2011)

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DOI: 10.1587/TRANSFUN.E94.A.2499

access: closed

type: Journal Article

metadata version: 2024-03-22

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  - https://dblp.org/rec/journals/ieicet/TakedaKNU11
Seidai Takeda, Kyundong Kim, Hiroshi Nakamura, Kimiyoshi Usami:
Sleep Transistor Sizing Method Using Accurate Delay Estimation Considering Input Vector Pattern and Non-linear Current Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(12): 2499-2509 (2011)

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