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"Circuit Techniques to Enhance Linearity and Intrinsic Gain to Realize a ..."

Yasuhiro Sugimoto, Kazuma Sakatoh (2013)

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DOI: 10.1587/TRANSELE.E96.C.867

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - https://dblp.org/rec/journals/ieicet/SugimotoS13
Yasuhiro Sugimoto, Kazuma Sakatoh:
Circuit Techniques to Enhance Linearity and Intrinsic Gain to Realize a 1.2 V, 200 MHz, +10.3 dBm IIP3 and 7th-Order LPF in a 65 nm CMOS. IEICE Trans. Electron. 96-C(6): 867-874 (2013)

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