"High-Performance Architecture for Concurrent Error Detection for AES ..."

Takeshi Sugawara et al. (2011)

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DOI: 10.1587/TRANSFUN.E94.A.1971

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type: Journal Article

metadata version: 2022-08-26

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Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh:
High-Performance Architecture for Concurrent Error Detection for AES Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(10): 1971-1980 (2011)

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