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"An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for ..."

Yuzuru Shizuku et al. (2015)

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DOI: 10.1587/TRANSFUN.E98.A.2600

access: closed

type: Journal Article

metadata version: 2020-04-11

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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/ShizukuHKNO15
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada:
An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(12): 2600-2606 (2015)

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