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"A New 1.25-Gb/s Burst Mode Clock and Data Recovery Circuit Using Two ..."

Chang-Kyung Seong, Seung-Woo Lee, Woo-Young Choi (2008)

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DOI: 10.1093/IETCOM/E91-B.5.1397

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - https://dblp.org/rec/journals/ieicet/SeongLC08
Chang-Kyung Seong, Seung-Woo Lee, Woo-Young Choi:
A New 1.25-Gb/s Burst Mode Clock and Data Recovery Circuit Using Two Digital Phase Aligners and a Phase Interpolator. IEICE Trans. Commun. 91-B(5): 1397-1402 (2008)

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