default search action
"An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology."
Tetsuro Matsuno et al. (2010)
- Tetsuro Matsuno, Daisuke Fujimoto, Daisuke Kosaka, Naoyuki Hamanishi, Ken Tanabe, Masazumi Shiochi, Makoto Nagata:
An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology. IEICE Trans. Electron. 93-C(6): 820-826 (2010)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.