Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Accelerating SAT-Based Boolean Matching for Heterogeneous FPGAs Using ..."

Yusuke Matsunaga (2016)

> Home

Details and statistics

DOI: 10.1587/TRANSFUN.E99.A.1374

access: closed

type: Journal Article

metadata version: 2020-04-11

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/Matsunaga16a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/Matsunaga16a
Yusuke Matsunaga:
Accelerating SAT-Based Boolean Matching for Heterogeneous FPGAs Using One-Hot Encoding and CEGAR Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7): 1374-1380 (2016)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.