"LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization."

Yu Hu et al. (2017)

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DOI: 10.1587/TRANSINF.2016EDP7184

access: closed

type: Journal Article

metadata version: 2023-05-22

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Yu Hu, Jing Ye, Zhiping Shi, Xiaowei Li:
LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization. IEICE Trans. Inf. Syst. 100-D(2): 323-331 (2017)

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