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"FPGA Implementation of a Stereo Matching Processor Based on ..."

Masanori Hariyama et al. (2005)

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DOI: 10.1093/IETFEC/E88-A.12.3516

access: closed

type: Journal Article

metadata version: 2020-04-11

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Masanori Hariyama, Yasuhiro Kobayashi, Haruka Sasaki, Michitaka Kameyama:
FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3516-3522 (2005)

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