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"A Design for Testability of Open Defects at Interconnects in 3D Stacked ICs."

Fara Ashikin et al. (2018)

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DOI: 10.1587/TRANSINF.2018EDP7093

access: closed

type: Journal Article

metadata version: 2020-04-11

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  dblp key:
  - journals/ieicet/AshikinHYLR18
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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/AshikinHYLR18
Fara Ashikin, Masaki Hashizume, Hiroyuki Yotsuyanagi, Shyue-Kung Lu, Zvi Roth:
A Design for Testability of Open Defects at Interconnects in 3D Stacked ICs. IEICE Trans. Inf. Syst. 101-D(8): 2053-2063 (2018)

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