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"Reconfigurable hardware architecture for Mean Level and log-t CFAR ..."

Jiafei Zhao et al. (2019)

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DOI: 10.1587/ELEX.16.20190584

access: open

type: Journal Article

metadata version: 2022-01-18

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  - https://dblp.org/rec/journals/ieiceee/ZhaoJYWG19
Jiafei Zhao, Rongkun Jiang, Hao Yang, Xuetian Wang, Hongmin Gao:
Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations. IEICE Electron. Express 16(21): 20190584 (2019)

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