"An interstage gain calibration technique for pipelined ADCs exploiting ..."

Huaiyu Zhai et al. (2024)

> Home

Details and statistics

DOI: 10.1587/ELEX.21.20240121

access: open

type: Journal Article

metadata version: 2024-05-18

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ieiceee/ZhaiJGJZWW24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceee/ZhaiJGJZWW24
Huaiyu Zhai, Hanbo Jia, Xuan Guo, Zilin Jiang, Yuzhen Zhang, Dandan Wang, Jin Wu:
An interstage gain calibration technique for pipelined ADCs exploiting complementary dithering and calibration windows detector. IEICE Electron. Express 21(8): 20240121 (2024)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.