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ORCID"A 2-stage-pipelined 16 port SRAM with 590Gbps random access bandwidth and ..."
Koh Johguchi et al. (2007)
- Koh Johguchi, Yuya Mukuda, Ken-ichi Aoyama, Hans Jürgen Mattausch, Tetsushi Koide:
A 2-stage-pipelined 16 port SRAM with 590Gbps random access bandwidth and large noise margin. IEICE Electron. Express 4(2): 21-25 (2007)
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