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"A Novel Methodology for Testing Hardware Security and Trust Exploiting ..."
Daisuke Fujimoto et al. (2016)
- Daisuke Fujimoto, Shivam Bhasin, Makoto Nagata, Jean-Luc Danger:
A Novel Methodology for Testing Hardware Security and Trust Exploiting On-Chip Power Noise Measurements (Extended Version). IACR Cryptol. ePrint Arch. 2016: 522 (2016)
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