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ORCID"A Gated Clock Scheme for Low Power Testing of Logic Cores."
Yannick Bonhomme et al. (2006)
- Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
:
A Gated Clock Scheme for Low Power Testing of Logic Cores. J. Electron. Test. 22(1): 89-99 (2006)
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