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"An FPGA Implementation of (3, 6)-Regular Low-Density Parity-Check Code ..."
Tong Zhang, Keshab K. Parhi (2003)
- Tong Zhang, Keshab K. Parhi:
An FPGA Implementation of (3, 6)-Regular Low-Density Parity-Check Code Decoder. EURASIP J. Adv. Signal Process. 2003(6): 530-542 (2003)
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