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ORCID"Reducing Power Dissipation, Delay, and Area in Logic Circuits by Narrowing ..."
Stephen H. Unger (2003)
- Stephen H. Unger:
Reducing Power Dissipation, Delay, and Area in Logic Circuits by Narrowing Transistors. IEEE Des. Test Comput. 20(6): 18-24 (2003)
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