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ORCID"Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time ..."
Chin-Hsin Lin, Marek Syrzycki (2011)
- Chin-Hsin Lin, Marek Syrzycki:
Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution. Circuits Syst. 2(4): 365-371 (2011)
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