"DSTN (Distributed Sleep Transistor Network) for Low Power Programmable ..."

Pradeep Singla, Kamya Dhingra, Naveen Kr. Malik (2012)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2021-01-23

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1206-0169
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1206-0169
Pradeep Singla, Kamya Dhingra, Naveen Kr. Malik:
DSTN (Distributed Sleep Transistor Network) for Low Power Programmable Logic array Design. CoRR abs/1206.0169 (2012)

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