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"FPGA architecture to perform symmetric extension on signals for handling ..."

Praveen Kumar Kasetty, Aniruddha Kanhe (2022)

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DOI: 10.1016/J.COMPELECENG.2022.108307

access: closed

type: Journal Article

metadata version: 2022-11-13

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Praveen Kumar Kasetty, Aniruddha Kanhe:
FPGA architecture to perform symmetric extension on signals for handling border discontinuities in FIR filtering. Comput. Electr. Eng. 103: 108307 (2022)

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