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"Designing positive, negative and standard gates for ternary logics using ..."

Seyede Fateme Kamali et al. (2020)

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DOI: 10.1016/J.COMPELECENG.2020.106590

access: closed

type: Journal Article

metadata version: 2020-06-15

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  - https://dblp.org/rec/journals/cee/KamaliTMRN20
Seyede Fateme Kamali, Sepehr Tabrizchi, Somaye Mohammadyan, Morteza Rastgoo, Keivan Navi:
Designing positive, negative and standard gates for ternary logics using quantum dot cellular automata. Comput. Electr. Eng. 83: 106590 (2020)

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