"Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core ..."

Rakesh Kumar et al. (2003)

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DOI: 10.1109/L-CA.2003.6

access: closed

type: Journal Article

metadata version: 2023-09-30

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Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, Dean M. Tullsen:
Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures. IEEE Comput. Archit. Lett. 2 (2003)

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