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"Unified Logical Effort - A Method for Delay Evaluation and Minimization in ..."

Arkadiy Morgenshtein et al. (2010)

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DOI: 10.1109/TVLSI.2009.2014239

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/MorgenshteinFGK10
Arkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny:
Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect. IEEE Trans. Very Large Scale Integr. Syst. 18(5): 689-696 (2010)

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