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"A 5-bit 3.2-GS/s Flash ADC With a Digital Offset Calibration Scheme."

Ying-Zu Lin, Cheng-Wu Lin, Soon-Jyh Chang (2010)

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DOI: 10.1109/TVLSI.2009.2013628

access: closed

type: Journal Article

metadata version: 2020-03-11

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Ying-Zu Lin, Cheng-Wu Lin, Soon-Jyh Chang:
A 5-bit 3.2-GS/s Flash ADC With a Digital Offset Calibration Scheme. IEEE Trans. Very Large Scale Integr. Syst. 18(3): 509-513 (2010)

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