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"A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder."

Heng-Yao Lin et al. (2008)

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DOI: 10.1109/TMM.2007.911299

access: closed

type: Journal Article

metadata version: 2020-10-01

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Heng-Yao Lin, Ying-Hong Lu, Bin-Da Liu, Jar-Ferr Yang:
A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder. IEEE Trans. Multim. 10(1): 31-42 (2008)

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