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"Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC ..."

Mehran Mozaffari Kermani, Vineeta Singh, Reza Azarderakhsh (2017)

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DOI: 10.1109/TCSI.2016.2610187

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/tcas/KermaniSA17
Mehran Mozaffari Kermani, Vineeta Singh, Reza Azarderakhsh:
Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1): 208-216 (2017)

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