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"A systematic design approach for low-power 10-bit 100 MS/s pipelined ADC."

D. Meganathan et al. (2009)

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DOI: 10.1016/J.MEJO.2009.06.004

access: closed

type: Journal Article

metadata version: 2023-09-30

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D. Meganathan, Amrith Sukumaran, M. M. Dinesh Babu, S. Moorthi, R. Deepalakshmi:
A systematic design approach for low-power 10-bit 100 MS/s pipelined ADC. Microelectron. J. 40(10): 1417-1435 (2009)

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