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"A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler Design Using a 12T ..."

Mahmut E. Sinangil et al. (2019)

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DOI: 10.1109/JSSC.2019.2895236

access: closed

type: Journal Article

metadata version: 2023-08-28

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Mahmut E. Sinangil, Yen-Ting Lin, Hung-Jen Liao, Jonathan Chang:
A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler Design Using a 12T Write Contention and Read Upset Free Bit-Cell. IEEE J. Solid State Circuits 54(4): 1152-1160 (2019)

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