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"A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power ..."

I-Ning Ku et al. (2012)

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DOI: 10.1109/JSSC.2012.2196731

access: closed

type: Journal Article

metadata version: 2020-08-30

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I-Ning Ku, Zhiwei Xu, Yen-Cheng Kuan, Yen-Hsiang Wang, Mau-Chung Frank Chang:
A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications. IEEE J. Solid State Circuits 47(8): 1854-1865 (2012)

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