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ORCID"A Novel Power-Managed Scan Architecture for Test Power and Test Time ..."
V. R. Devanathan et al. (2008)
- V. R. Devanathan, C. P. Ravikumar, Rajat Mehrotra, V. Kamakoti:
A Novel Power-Managed Scan Architecture for Test Power and Test Time Reduction. J. Low Power Electron. 4(1): 101-110 (2008)
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