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ORCID"A 3 mW 1.2-3.6 GHz Multi-Phase PLL-Based Clock Generator with TDC Assisted ..."
Jili Zhang et al. (2018)
- Jili Zhang, Yu Li, Shengxi Diao, Xuefei Bai, Fujiang Lin:
A 3 mW 1.2-3.6 GHz Multi-Phase PLL-Based Clock Generator with TDC Assisted Auto-Calibration of Loop Bandwidth. J. Circuits Syst. Comput. 27(8): 1850117:1-1850117:18 (2018)
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