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"Power Analysis of VLSI Interconnect with RLC Tree Models and Model Reduction."

Youngsoo Shin, Junghyup Lee (2006)

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DOI: 10.1142/S0218126606003180

access: closed

type: Journal Article

metadata version: 2020-08-25

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Youngsoo Shin, Junghyup Lee:
Power Analysis of VLSI Interconnect with RLC Tree Models and Model Reduction. J. Circuits Syst. Comput. 15(3): 399-408 (2006)

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