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"BUTHA: Boost Up Clock Terminal with Heuristic Approach for NoC."

Erulappan Sakthivel, Veluchamy Malathi, Muruganantham Arunraja (2018)

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DOI: 10.1142/S0218126618500846

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - https://dblp.org/rec/journals/jcsc/SakthivelMA18
Erulappan Sakthivel, Veluchamy Malathi, Muruganantham Arunraja:
BUTHA: Boost Up Clock Terminal with Heuristic Approach for NoC. J. Circuits Syst. Comput. 27(6): 1850084:1-1850084:27 (2018)

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