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"Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs."

Zhi Liang Wang et al. (2005)

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DOI: 10.1093/IETCOM/E88-B.8.3176

access: closed

type: Journal Article

metadata version: 2022-10-02

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  - journals/ieicet/WangWHYTK05
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  - https://dblp.org/rec/journals/ieicet/WangWHYTK05
Zhi Liang Wang, Osami Wada, Takashi Harada, Takahiro Yaguchi, Yoshitaka Toyota, Ryuji Koga:
Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs. IEICE Trans. Commun. 88-B(8): 3176-3181 (2005)

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