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"PhaseMAC: A 14 TOPS/W 8bit GRO based Phase Domain MAC Circuit for ..."

Kentaro Yoshioka et al. (2018)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-09-03

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1808-09335
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1808-09335
Kentaro Yoshioka, Yosuke Toyama, Koichiro Ban, Daisuke Yashima, Shigeru Maya, Akihide Sai, Kohei Onizuka:
PhaseMAC: A 14 TOPS/W 8bit GRO based Phase Domain MAC Circuit for In-Sensor-Computed Deep Learning Accelerators. CoRR abs/1808.09335 (2018)

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