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"Design and Implementation of Fine-Grain Power Gating with Ground Bounce ..."

Kimiyoshi Usami et al. (2009)

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DOI: 10.1109/VLSI.DESIGN.2009.63

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-22

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Kimiyoshi Usami, Toshiaki Shirai, Tatsunori Hashida, Hiroki Masuda, Seidai Takeda, Mitsutaka Nakata, Naomi Seki, Hideharu Amano, Mitaro Namiki, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura:
Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression. VLSI Design 2009: 381-386

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