Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Design and Implementation of a High-Speed, Power-Efficient, Modified ..."

Debajit Bhattacharya, Ashis Maity, Amit Patra (2013)

> Home

Details and statistics

DOI: 10.1109/VLSID.2013.189

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/BhattacharyaMP13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/BhattacharyaMP13
Debajit Bhattacharya, Ashis Maity, Amit Patra:
Design and Implementation of a High-Speed, Power-Efficient, Modified Hybrid-Mode Sense Amplifier for SRAM Applications. VLSI Design 2013: 209-214

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.