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"14.5 A 1.22ps integrated-jitter 0.25-to-4GHz fractional-N ADPLL in 16nm ..."

Tsung-Hsien Tsai et al. (2015)

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DOI: 10.1109/ISSCC.2015.7063025

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-02

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Tsung-Hsien Tsai, Min-Shueh Yuan, Chih-Hsien Chang, Chia-Chun Liao, Chao-Chieh Li, Robert Bogdan Staszewski:
14.5 A 1.22ps integrated-jitter 0.25-to-4GHz fractional-N ADPLL in 16nm FinFET CM0S. ISSCC 2015: 1-3

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