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"High-Level Area and Performance Estimation of Hardware Building Blocks on ..."

Rolf Enzler et al. (2000)

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DOI: 10.1007/3-540-44614-1_57

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard Tröster:
High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs. FPL 2000: 525-534

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