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"Recording Synthesis History for Sequential Verification."

Alan Mishchenko, Robert K. Brayton (2008)

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DOI: 10.1109/FMCAD.2008.ECP.8

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  dblp key:
  - conf/fmcad/MishchenkoB08
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  - https://dblp.org/rec/conf/fmcad/MishchenkoB08
Alan Mishchenko, Robert K. Brayton:
Recording Synthesis History for Sequential Verification. FMCAD 2008: 1-8

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